Wire space estimation and routability analysis
نویسندگان
چکیده
Abstract This paper presents a new stochastic model for two dimensional layouts of large size. Two problems are addressed: (i) Under the condition that the number of wires emanating from a block is Poisson distributed, determine the distribution of channel width, thus estimating the average channel width. (ii) Given T tracks for each channel, determine the success probability of routing an M×M cell array chip. For both problems closed formulae are obtained. The experiment demonstrates the effectiveness of our approach. The results can be applied to gate array, FPGA’s design.
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ورودعنوان ژورنال:
- IEEE Trans. on CAD of Integrated Circuits and Systems
دوره 19 شماره
صفحات -
تاریخ انتشار 2000